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Sr. Staff Embedded Firmware/FPGA Systems Engineer at Augusta Life Sciences US OpCo I LLC · Katori

Asks for

The ad says“Proficiency in Verilog, VHDL, or SystemVerilog; experience authoring RTL for FPGA, developing simulation testbenches, and driving synthesis and timing closure using Xilinx Vivado or Intel Quartus. Familiarity with AXI4/AXI-Stream interconnects and DMA controller design.”
The ad says“Experience with Python, C/C++, version control systems, and modern development tools.”
The ad says“Experience with common hardware interfaces such as SPI, I2C, UART, PCIe Gen 3/4/5, JESD204B/C, DDR3/DDR4, or equivalent.”
The ad says“Proficiency in Verilog, VHDL, or SystemVerilog; experience authoring RTL for FPGA, developing simulation testbenches, and driving synthesis and timing closure using Xilinx Vivado or Intel Quartus. Familiarity with AXI4/AXI-Stream interconnects and DMA controller design.”
The ad says“Strong understanding of embedded Linux systems, including kernel configuration and demonstrated driver development skills”
The ad says“Strong understanding of embedded Linux systems, including kernel configuration and demonstrated driver development skills”
The ad says“Experience with common hardware interfaces such as SPI, I2C, UART, PCIe Gen 3/4/5, JESD204B/C, DDR3/DDR4, or equivalent.”
The ad says“Proficiency in Verilog, VHDL, or SystemVerilog; experience authoring RTL for FPGA, developing simulation testbenches, and driving synthesis and timing closure using Xilinx Vivado or Intel Quartus. Familiarity with AXI4/AXI-Stream interconnects and DMA controller design.”
The ad says“Experience with common hardware interfaces such as SPI, I2C, UART, PCIe Gen 3/4/5, JESD204B/C, DDR3/DDR4, or equivalent.”
The ad says“Strong understanding of embedded Linux systems, including kernel configuration and demonstrated driver development skills”
The ad says“Strong understanding of test bench development; simulations (ModelSim, VCS) and developing verification plans”
The ad says“Experience with common hardware interfaces such as SPI, I2C, UART, PCIe Gen 3/4/5, JESD204B/C, DDR3/DDR4, or equivalent.”
The ad says“Experience with Python, C/C++, version control systems, and modern development tools.”
The ad says“Proficiency in Verilog, VHDL, or SystemVerilog; experience authoring RTL for FPGA, developing simulation testbenches, and driving synthesis and timing closure using Xilinx Vivado or Intel Quartus. Familiarity with AXI4/AXI-Stream interconnects and DMA controller design.”
The ad says“Experience with common hardware interfaces such as SPI, I2C, UART, PCIe Gen 3/4/5, JESD204B/C, DDR3/DDR4, or equivalent.”
The ad says“Proficiency in Verilog, VHDL, or SystemVerilog; experience authoring RTL for FPGA, developing simulation testbenches, and driving synthesis and timing closure using Xilinx Vivado or Intel Quartus. Familiarity with AXI4/AXI-Stream interconnects and DMA controller design.”
The ad says“Experience with common hardware interfaces such as SPI, I2C, UART, PCIe Gen 3/4/5, JESD204B/C, DDR3/DDR4, or equivalent.”
The ad says“Strong understanding of test bench development; simulations (ModelSim, VCS) and developing verification plans”
The ad says“Strong understanding of test bench development; simulations (ModelSim, VCS) and developing verification plans”
The ad says“Proficiency in Verilog, VHDL, or SystemVerilog; experience authoring RTL for FPGA, developing simulation testbenches, and driving synthesis and timing closure using Xilinx Vivado or Intel Quartus. Familiarity with AXI4/AXI-Stream interconnects and DMA controller design.”
The ad says“Experience with Python, C/C++, version control systems, and modern development tools.”
The ad says“Proficiency in Verilog, VHDL, or SystemVerilog; experience authoring RTL for FPGA, developing simulation testbenches, and driving synthesis and timing closure using Xilinx Vivado or Intel Quartus. Familiarity with AXI4/AXI-Stream interconnects and DMA controller design.”
The ad says“Proficiency in Verilog, VHDL, or SystemVerilog; experience authoring RTL for FPGA, developing simulation testbenches, and driving synthesis and timing closure using Xilinx Vivado or Intel Quartus. Familiarity with AXI4/AXI-Stream interconnects and DMA controller design.”

As a result of the combination of the BD Biosciences and Diagnostic Solutions business with Waters Corporation (NYSE: WAT), by applying to this role, you will be applying for a position with Waters. Waters is a global leader in life sciences, dedicated to accelerating the benefits of pioneering science through analytical technologies, informatics, and service. With a focus on regulated, high-volume testing environments, Waters’ innovative portfolio harnesses deep scientific expertise across biology, chemistry, and physics. Waters collaborates with analytical laboratories around the world to advance the release of effective, high-quality medicines, assure the safety of food and water, and drive better patient outcomes by detecting diseases earlier, managing routine infections, and combatting growing antibiotic resistance. Through a shared culture of relentless innovation, Waters’ passionate team of approximately 16,000 colleagues partner with customers to turn scientific challenges into breakthroughs that improve lives worldwide.



We are the people who give possibilities purpose

BD is one of the largest global medical technology companies in the world. Advancing the world of health™ is our Purpose, and it’s no small feat. It takes the imagination and passion of all of us—from design and engineering to the manufacturing and marketing of our billions of MedTech products per year—to look at the impossible and find transformative solutions that turn dreams into possibilities.

Job Description

We are seeking a technically strong engineer to drive embedded firmware and FPGA development on ARM-based instrumentation platforms. You will own end-to-end system architecture — defining the right partitioning between on-board FPGA logic, ARM SoC firmware, and off-board host/edge/cloud compute. You will design RTL for FPGA, develop Linux BSP components, and optimize data-path performance across memory, DMA, and high-speed I/O boundaries.

Key Responsibilities:

Provide technical direction and architectural guidance for embedded firmware and FPGA development across multiple product lines.
Own the development and architecture of embedded firmware and programmable logic for complex instrumentation systems
Define architecture, balancing on-board (ARM SoC/DSP/FPGA) and off-board compute
Develop Linux BSP Components, kernel configuration, boot loaders, HALs and device drivers
Build embedded services in C/C++ and develop python-based automation for testing, validation and workflows
Collaborate with a distributed global team to deliver on goals

Education and Qualifications:

BS degree in Electrical Engineering, Computer Engineering, Computer Science, or related field required; MS preferred
10+ years of experience in embedded firmware and FPGA development, including technical leadership roles.
Proficiency in Verilog, VHDL, or SystemVerilog; experience authoring RTL for FPGA, developing simulation testbenches, and driving synthesis and timing closure using Xilinx Vivado or Intel Quartus. Familiarity with AXI4/AXI-Stream interconnects and DMA controller design.
Experience with Python, C/C++, version control systems, and modern development tools.
Experience with common hardware interfaces such as SPI, I2C, UART, PCIe Gen 3/4/5, JESD204B/C, DDR3/DDR4, or equivalent.
Strong understanding of embedded Linux systems, including kernel configuration and demonstrated driver development skills
Strong understanding of test bench development; simulations (ModelSim, VCS) and developing verification plans
Ability to communicate complex technical concepts effectively and influence technical direction while championing engineering excellence and best practices.
Demonstrated success collaborating across multidisciplinary teams, applying systems-level thinking to develop and deliver robust, integrated product solutions.

Preferred Attributes:

Technically competent with a broad understanding of system-level needs and cross-functional roles.
Experience in FPGA-based data acquisition systems in Flow Cytometry, Genomics, or similar high-throughput biomedical instrumentation
Experience with high-speed FPGA interfaces such as JESD204B/C (ADC/DAC connectivity), PCIe, DDR4/LPDDR, or USB 3.x in instrumentation or adjacent high-throughput domains
Experience improving legacy codebases and guiding teams toward sustainable engineering practices.

Work Environment:

Onsite Position: will require on-site and in lab work a minimum of 4 days/week

At BD, we prioritize on-site collaboration because we believe it fosters creativity, innovation, and effective problem-solving, which are essential in the fast-paced healthcare industry. For most roles, we require a minimum of 4 days of in-office presence per week to maintain our culture of excellence and ensure smooth operations, while also recognizing the importance of flexibility and work-life balance. Remote or field-based positions will have different workplace arrangements which will be indicated in the job posting.

For certain roles at BD, employment is contingent upon the Company’s receipt of sufficient proof that you are fully vaccinated against COVID-19. In some locations, testing for COVID-19 may be available and/or required. Consistent with BD’s Workplace Accommodations Policy, requests for accommodation will be considered pursuant to applicable law.

Why Join Us?

To find purpose in the possibilities, we need people who can see the bigger picture, who understand the human story that underpins everything we do. We welcome people with the imagination and drive to help us reinvent the future of healthcare. At BD, you’ll discover a culture in which you can learn, grow and thrive.

We believe that when people connect in person, we learn faster, collaborate more deeply, and build a stronger culture. Join us and enjoy a culture where face-to-face collaboration supports your learning, your progress, and your success.

To learn more about BD visit https://bd.com/careers.

Becton, Dickinson, and Company is an Equal Opportunity Employer. We evaluate applicants without regard to race, color, religion, age, sex, creed, national origin, ancestry, citizenship status, marital or domestic or civil union status, familial status, affectional or sexual orientation, gender identity or expression, genetics, disability, military eligibility or veteran status, and other legally protected characteristics.

Required Skills

Optional Skills

Primary Work Location

USA CA - Milpitas 155

Additional Locations

Work Shift

At BD, we reward, support and develop our associates through our comprehensive Total Rewards program. We are committed to attracting and retaining high quality talent by providing reward and recognition opportunities that promote a performance-based culture, as well as a competitive package of compensation and benefits programs. You can learn more on our career site under "Our Commitment to You."

Our salary or hourly rate ranges reward associates fairly and competitively. We regularly review these ranges and factors, such as location, contribute to the range displayed.

Our pay is based on the role and the necessary skills and education to perform it successfully. The salary or hourly rate offered is determined by the role's specific requirements, including any applicable step rate pay system at the work location. Salary or hourly pay ranges are influenced by labor laws and Collective Bargaining Agreement (CBA) requirements applicable to the work location which may also affect the workplace arrangement of the role.

Salary Range Information

$168,600.00 - $269,800.00 USD Annual