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Silicon Performance, Power and Binning Tools Engineer at Mellanox Technologies, Ltd. · Katori

Asks for

The ad says“Hands-on experience applying LLMs to engineering problems: agents, MCP, RAG, or evaluation pipelines. Have shipped an LLM-backed feature in production and can tell us about a time you had to debug one.”
The ad says“Strong understanding of digital design, circuit analysis, algorithms, computer architecture, silicon speed and power, BIOS, drivers, and software applications”
The ad says“Strong understanding of digital design, circuit analysis, algorithms, computer architecture, silicon speed and power, BIOS, drivers, and software applications”
The ad says“Strong understanding of digital design, circuit analysis, algorithms, computer architecture, silicon speed and power, BIOS, drivers, and software applications”
The ad says“Strong understanding of digital design, circuit analysis, algorithms, computer architecture, silicon speed and power, BIOS, drivers, and software applications”
The ad says“Experience with Perl/Python, databases, and web applications”
The ad says“Strong understanding of digital design, circuit analysis, algorithms, computer architecture, silicon speed and power, BIOS, drivers, and software applications”
The ad says“Strong understanding of digital design, circuit analysis, algorithms, computer architecture, silicon speed and power, BIOS, drivers, and software applications”
The ad says“Hands-on experience applying LLMs to engineering problems: agents, MCP, RAG, or evaluation pipelines. Have shipped an LLM-backed feature in production and can tell us about a time you had to debug one.”
The ad says“Strong instincts for data quality: the automated checks, schema validation, and integration tests that keep pipelines trustworthy when inputs change.”
The ad says“Hands-on experience applying LLMs to engineering problems: agents, MCP, RAG, or evaluation pipelines. Have shipped an LLM-backed feature in production and can tell us about a time you had to debug one.”
The ad says“Hands-on experience applying LLMs to engineering problems: agents, MCP, RAG, or evaluation pipelines. Have shipped an LLM-backed feature in production and can tell us about a time you had to debug one.”
The ad says“Strong fundamentals in software algorithms and object-oriented programming. Demonstrate ability to divide complex problems into simple sub-problems and reuse available solutions to solve a broad range of challenges efficiently”
The ad says“Experience with Perl/Python, databases, and web applications”
The ad says“Experience with Perl/Python, databases, and web applications”
The ad says“Hands-on experience applying LLMs to engineering problems: agents, MCP, RAG, or evaluation pipelines. Have shipped an LLM-backed feature in production and can tell us about a time you had to debug one.”
The ad says“Strong instincts for data quality: the automated checks, schema validation, and integration tests that keep pipelines trustworthy when inputs change.”
The ad says“Strong understanding of digital design, circuit analysis, algorithms, computer architecture, silicon speed and power, BIOS, drivers, and software applications”
The ad says“Strong understanding of digital design, circuit analysis, algorithms, computer architecture, silicon speed and power, BIOS, drivers, and software applications”
The ad says“Experience with Perl/Python, databases, and web applications”

Every CPU, GPU, and Tegra SoC NVIDIA has shipped in the past four years passed through our toolchain on its way to production. Over 200 product SKUs were optimized during the Blackwell generation alone! Now we're looking for an engineer to help us rebuild that toolchain around AI.

We focus on the silicon layer of NVIDIA's productization work: the chip behavior piece. Our tools run the simulation, configuration, and data flow that take a chip's power, performance, and yield from pre-silicon estimates through to the values that ship in firmware and populate customer specs. This role is about making those tools talk to each other better, using AI to optimally move outputs from simulation into the downstream firmware, manufacturing, and specification systems that consume them.

What you'll be doing:

Build the infrastructure that turns raw simulation data (power, noise, binning yields, and more) into real firmware tuning, product specs, and manufacturing limits. You own the pipelines between tools.
Use LLMs and agents across the toolchain to automate the analysis, validation, and reporting work that currently costs engineering countless hours per chip.
Build the observability and validation systems that catch data errors and inconsistencies before they turn into release blockers.
Work with product convergence, silicon architecture, firmware, and manufacturing teams to translate new hardware requirements and capabilities into workflows that make it to production.

What we need to see:

BS/MS in CS, CE, EE, or Systems Engineering, or equivalent experience.
4+ years of experience in a related hardware/software position
Strong understanding of digital design, circuit analysis, algorithms, computer architecture, silicon speed and power, BIOS, drivers, and software applications
Experience with Perl/Python, databases, and web applications
Strong fundamentals in software algorithms and object-oriented programming. Demonstrate ability to divide complex problems into simple sub-problems and reuse available solutions to solve a broad range of challenges efficiently
Hands-on experience applying LLMs to engineering problems: agents, MCP, RAG, or evaluation pipelines. Have shipped an LLM-backed feature in production and can tell us about a time you had to debug one.
Strong instincts for data quality: the automated checks, schema validation, and integration tests that keep pipelines trustworthy when inputs change.
You keep up with a fast-paced AI landscape and can distinguish which new tools matter and which are just hype

Ways to stand out from the crowd:

Silicon product proficiency (speed, power, voltage noise, binning); MCP, DSPy, or LLM evaluation frameworks; Perl interop for legacy chip-data workflows; have crafted dashboards and visualizations for diverse collaborators.

Keeping up with every new feature and architectural change that NVIDIA packs into each chip generation is a real challenge. And because our users are directly on the path to production, support questions don't always wait for business hours. The payoff is that every product NVIDIA ships goes through the systems you'll help build. If that's the kind of problem you want to work on, we'd like to talk.

Asks for

Values