Asks for

The ad says“DE verifying integration and functionality of design utilizing verification tools and techniques, including Verilog, System Verilog, and overall ASIC design flow.”
The ad says“DE working with verification plan generation, coverage analysis transaction level modelling, pseudo and constrained random techniques, assertion based and formal verification techniques with System Verilog.”
The ad says“Demonstrated expertise (DE) applying digital design methodologies, including RTL design, Lint, and CDC, to design digital or mixed signal products. DE running simulations, synthesis, and CDC using Cadence or Synopsis tools.”
The ad says“Demonstrated expertise (DE) applying digital design methodologies, including RTL design, Lint, and CDC, to design digital or mixed signal products. DE running simulations, synthesis, and CDC using Cadence or Synopsis tools.”
The ad says“DE working with verification plan generation, coverage analysis transaction level modelling, pseudo and constrained random techniques, assertion based and formal verification techniques with System Verilog.”
The ad says“Demonstrated expertise (DE) applying digital design methodologies, including RTL design, Lint, and CDC, to design digital or mixed signal products. DE running simulations, synthesis, and CDC using Cadence or Synopsis tools.”
The ad says“DE working with verification plan generation, coverage analysis transaction level modelling, pseudo and constrained random techniques, assertion based and formal verification techniques with System Verilog.”
The ad says“Demonstrated expertise (DE) applying digital design methodologies, including RTL design, Lint, and CDC, to design digital or mixed signal products. DE running simulations, synthesis, and CDC using Cadence or Synopsis tools.”
The ad says“Demonstrated expertise (DE) applying digital design methodologies, including RTL design, Lint, and CDC, to design digital or mixed signal products. DE running simulations, synthesis, and CDC using Cadence or Synopsis tools.”
The ad says“Demonstrated expertise (DE) applying digital design methodologies, including RTL design, Lint, and CDC, to design digital or mixed signal products. DE running simulations, synthesis, and CDC using Cadence or Synopsis tools.”
The ad says“Demonstrated expertise (DE) applying digital design methodologies, including RTL design, Lint, and CDC, to design digital or mixed signal products. DE running simulations, synthesis, and CDC using Cadence or Synopsis tools.”
The ad says“DE verifying integration and functionality of design utilizing verification tools and techniques, including Verilog, System Verilog, and overall ASIC design flow.”
The ad says“DE working with verification plan generation, coverage analysis transaction level modelling, pseudo and constrained random techniques, assertion based and formal verification techniques with System Verilog.”
The ad says“DE verifying integration and functionality of design utilizing verification tools and techniques, including Verilog, System Verilog, and overall ASIC design flow.”
The ad says“Duties: Develop state-of-the-art solutions involving analog, mixed-signal, power, RF, and digital signal processing integrated circuits used in electronic equipment for a wide-range of industries, including healthcare, communications, aerospace and defense, instrumentation, and emerging markets. Work with cross-functional teams, including analog design, systems design, firmware, applications, product engineering and ATE on product development through successful product execution. Participate in the entire product development lifecycle from definition to product release. Apply formal design and verification techniques to design and architect detailed verification plans. Perform simulation, debugging, code coverage, and gate level simulations. Work with design teams to resolve complex debugging and verification failures. Develop test plans and work with product, applications, and test engineers to ensure designs meet performance and testability goals. Write user guides to define software setup and operating procedures. Work with and run block and top-level test benches to verify modules and integration of designs. Perform new digital design using Verilog RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA designs. Document design work, present results, and participate in project meetings. Partial telecommute benefit (2 days/week work from home).”

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).

Employer: Analog Devices, Inc.

Job Title: Senior Engineer, Digital Design Engineering

Job Requisition: 1010.1270.10 / R262587

Job Location: 950 Chapel Hills Dr, Colorado Springs, Colorado 80920

Job Type: Full Time

Rate of Pay: $112,020 to $166,668 per year

[multiple openings]

Duties: Develop state-of-the-art solutions involving analog, mixed-signal, power, RF, and digital signal processing integrated circuits used in electronic equipment for a wide-range of industries, including healthcare, communications, aerospace and defense, instrumentation, and emerging markets. Work with cross-functional teams, including analog design, systems design, firmware, applications, product engineering and ATE on product development through successful product execution. Participate in the entire product development lifecycle from definition to product release. Apply formal design and verification techniques to design and architect detailed verification plans. Perform simulation, debugging, code coverage, and gate level simulations. Work with design teams to resolve complex debugging and verification failures. Develop test plans and work with product, applications, and test engineers to ensure designs meet performance and testability goals. Write user guides to define software setup and operating procedures. Work with and run block and top-level test benches to verify modules and integration of designs. Perform new digital design using Verilog RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA designs. Document design work, present results, and participate in project meetings. Partial telecommute benefit (2 days/week work from home).

Requirements: Must have a Master’s degree in Electrical Engineering, Electronic Engineering, Computer Science, Computer Engineering, or closely related technical field (willing to accept foreign education equivalent) and 24 months of experience as a Digital Design Engineer or related occupation performing digital or mixed signal design and verification.

Must also possess the following (quantitative experience requirements not applicable to this section):

Demonstrated expertise (DE) applying digital design methodologies, including RTL design, Lint, and CDC, to design digital or mixed signal products. DE running simulations, synthesis, and CDC using Cadence or Synopsis tools.
DE verifying integration and functionality of design utilizing verification tools and techniques, including Verilog, System Verilog, and overall ASIC design flow.
DE working with verification plan generation, coverage analysis transaction level modelling, pseudo and constrained random techniques, assertion based and formal verification techniques with System Verilog.
DE participating in all phases of digital design development and tapeout activities (architecture, debug, gate level simulations, and evaluation).

Contact: Eligible for employee referral program. Apply online at https://www.analog.com/en/careers.html and Reference Position Number: R262587.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

EEO is the Law: Notice of Applicant Rights Under the Law.

Job Req Type: Experienced

Required Travel: No

Shift Type: 1st Shift/Days

Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.
This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.
This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.