The ad says“Experience with design and routing for high-Speed Interfaces including JESD204B, 10G Ethernet, etc”
The ad says“Experience working with Altium”
The ad says“Experience with clock generation, PLLs, jitter cleaning, clock distribution, and general concepts around timing stability and coherency”
The ad says“Experience with clock generation, PLLs, jitter cleaning, clock distribution, and general concepts around timing stability and coherency”
The ad says“Experience with clock generation, PLLs, jitter cleaning, clock distribution, and general concepts around timing stability and coherency”
The ad says“Strong communication skills and ability to put together thorough design documentation”
The ad says“Familiar with various memory including QSPI, UFS, DDR3/4, eMMC”
The ad says“Strong communication skills and ability to put together thorough design documentation”
The ad says“Familiar with various memory including QSPI, UFS, DDR3/4, eMMC”
The ad says“5+ years of Hardware Design experience (schematic and layout)”
The ad says“Low-level electrical design, high-speed layout”
The ad says“Experience with design and routing for high-Speed Interfaces including JESD204B, 10G Ethernet, etc”
The ad says“Experience with clock generation, PLLs, jitter cleaning, clock distribution, and general concepts around timing stability and coherency”
The ad says“Low-level electrical design, high-speed layout”
The ad says“Comfortable in a lab environment and experience using standard tools such as oscilloscopes, spectrum analyzers, multimeters, VNA’s, etc”
The ad says“Comfortable in a lab environment and experience using standard tools such as oscilloscopes, spectrum analyzers, multimeters, VNA’s, etc”
The ad says“Experience with clock generation, PLLs, jitter cleaning, clock distribution, and general concepts around timing stability and coherency”
The ad says“Familiar with various memory including QSPI, UFS, DDR3/4, eMMC”
The ad says“Experience with schematic and layout of processors, FPGAs, SoCs, DAC/ADCs or other high speed digital components”
The ad says“Comfortable in a lab environment and experience using standard tools such as oscilloscopes, spectrum analyzers, multimeters, VNA’s, etc”
The ad says“Experience with clock generation, PLLs, jitter cleaning, clock distribution, and general concepts around timing stability and coherency”
The ad says“Familiar with various memory including QSPI, UFS, DDR3/4, eMMC”
The ad says“Comfortable in a lab environment and experience using standard tools such as oscilloscopes, spectrum analyzers, multimeters, VNA’s, etc”
We are looking for a Senior Electrical Engineer & Team Lead to support the development of the electrical and communication interface of Kepler’s satellite to advanced internal and customer designed payloads
You will be developing hardware solutions to support Kepler’s space technology that requires the utilization of leading technology and practice
You will work closely with other cross-functional engineering teams including RF, mechanical, software, and FPGA to develop full product solutions
Accountable for a small number of direct reports, including conducting regular 1:1s, and managing time off and time tracking approvals
Responsible for overseeing onboarding and offboarding processes for team members
Ensure team members perform at a high level and complete performance reviews in alignment with company processes
Support team members and foster strong collaboration within the team. and strengthen collaboration
Develop and own hardware solutions to support Kepler’s space technology that requires the utilization of leading technology and practices
Lead design reviews for active designs to minimize design gaps
Conduct and document engineering analysis including derating, reliability, radiation, EMI/EMC, FMECA, and power budgets
Contribute to best practices and development of internal standards
Execute development of future satellite generations, helping push the boundaries of space communications
Maintain technical documentation that captures design decisions, design specifications, block diagrams, interface requirements, and system architecture reports
Develop full product solutions by working closely with other cross-fun
Benefits
Unlimited Vacation
Comprehensive Health Coverage
Stock Options
Flexible & Hybrid Work Options
Professional Development
Preferred experience
Experience with schematic and layout of processors, FPGAs, SoCs, DAC/ADCs or other high speed digital components
Strong communication skills and ability to put together thorough design documentation
5+ years of Hardware Design experience (schematic and layout)
Lead development of multi-board systems, and handling electrical interface planning and definition
Comfortable in a lab environment and experience using standard tools such as oscilloscopes, spectrum analyzers, multimeters, VNA’s, etc
Familiar with various memory including QSPI, UFS, DDR3/4, eMMC
Experience working in a rapid learning / agile environment that drives early learnings when requirements are not locked down or when attribute development is needed
Experience with design and routing for high-Speed Interfaces including JESD204B, 10G Ethernet, etc
Ability to own a project from the architecture stage to the design validation stage
Bachelor’s degree in Electrical Engineering or equivalent
Experience with clock generation, PLLs, jitter cleaning, clock distribution, and general concepts around timing stability and coherency
Experience working in an aerospace or high-reliability (high-rel) environment
Experience designing hardware/systems to operate in a radiation environment
