Senior AMS Verification Engineer – Oulu

Asks for

• analog circuit designThe ad says“Experience: Proven successful industrial track record in IC design as a senior analog/lead/AMS engineer is mandatory. Demonstrated understanding of analog circuit design, including block and top-level concepts, circuit topologies, design trade-offs, and transistor-level understanding. Experience in ramping up top-level AMS/DMS verification environments, including building top-level schematics. Strong system level understanding to support “First Time Right” product delivery. A solid understanding of hardware description languages (Verilog-A, Verilog-AMS & SystemVerilog), with emphasis on their use in analog and mixed-signal simulation.”
• analog/mixed-signal simulationThe ad says“Experience: Proven successful industrial track record in IC design as a senior analog/lead/AMS engineer is mandatory. Demonstrated understanding of analog circuit design, including block and top-level concepts, circuit topologies, design trade-offs, and transistor-level understanding. Experience in ramping up top-level AMS/DMS verification environments, including building top-level schematics. Strong system level understanding to support “First Time Right” product delivery. A solid understanding of hardware description languages (Verilog-A, Verilog-AMS & SystemVerilog), with emphasis on their use in analog and mixed-signal simulation.”
• circuit topologiesThe ad says“Experience: Proven successful industrial track record in IC design as a senior analog/lead/AMS engineer is mandatory. Demonstrated understanding of analog circuit design, including block and top-level concepts, circuit topologies, design trade-offs, and transistor-level understanding. Experience in ramping up top-level AMS/DMS verification environments, including building top-level schematics. Strong system level understanding to support “First Time Right” product delivery. A solid understanding of hardware description languages (Verilog-A, Verilog-AMS & SystemVerilog), with emphasis on their use in analog and mixed-signal simulation.”
• mixed signal verification flowsThe ad says“Driving Innovation: You work as part of interdisciplinary team developing mixed signal ICs for consumer market space from concept to implementation. You are partly responsible for developing leading edge analog IP as well as efficient mixed signal verification flows.”
• SystemVerilogThe ad says“Experience: Proven successful industrial track record in IC design as a senior analog/lead/AMS engineer is mandatory. Demonstrated understanding of analog circuit design, including block and top-level concepts, circuit topologies, design trade-offs, and transistor-level understanding. Experience in ramping up top-level AMS/DMS verification environments, including building top-level schematics. Strong system level understanding to support “First Time Right” product delivery. A solid understanding of hardware description languages (Verilog-A, Verilog-AMS & SystemVerilog), with emphasis on their use in analog and mixed-signal simulation.”
• Verilog-AThe ad says“Experience: Proven successful industrial track record in IC design as a senior analog/lead/AMS engineer is mandatory. Demonstrated understanding of analog circuit design, including block and top-level concepts, circuit topologies, design trade-offs, and transistor-level understanding. Experience in ramping up top-level AMS/DMS verification environments, including building top-level schematics. Strong system level understanding to support “First Time Right” product delivery. A solid understanding of hardware description languages (Verilog-A, Verilog-AMS & SystemVerilog), with emphasis on their use in analog and mixed-signal simulation.”
• Verilog-AMSThe ad says“Experience: Proven successful industrial track record in IC design as a senior analog/lead/AMS engineer is mandatory. Demonstrated understanding of analog circuit design, including block and top-level concepts, circuit topologies, design trade-offs, and transistor-level understanding. Experience in ramping up top-level AMS/DMS verification environments, including building top-level schematics. Strong system level understanding to support “First Time Right” product delivery. A solid understanding of hardware description languages (Verilog-A, Verilog-AMS & SystemVerilog), with emphasis on their use in analog and mixed-signal simulation.”