Values

The ad says“Exposure through coursework, research, or internship experience to semiconductor test chip design, silicon characterization, validation, process monitoring, advanced CMOS technologies, DRAM, HBM, or semiconductor automation.”
The ad says“Familiarity with data analytics, machine learning, Artificial Intelligence, Generative AI, Large Language Models (LLMs), AI Agents, Agentic AI, Cloud Assist, Code Assist, Roo Code, or other AI-Enabled engineering applications used to support technical analysis, automation, and productivity improvements.”
The ad says“Familiarity with data analytics, machine learning, Artificial Intelligence, Generative AI, Large Language Models (LLMs), AI Agents, Agentic AI, Cloud Assist, Code Assist, Roo Code, or other AI-Enabled engineering applications used to support technical analysis, automation, and productivity improvements.”
The ad says“Familiarity with data analytics, machine learning, Artificial Intelligence, Generative AI, Large Language Models (LLMs), AI Agents, Agentic AI, Cloud Assist, Code Assist, Roo Code, or other AI-Enabled engineering applications used to support technical analysis, automation, and productivity improvements.”
The ad says“Experience using EDA tools such as Cadence Virtuoso, Calibre, Synopsys, or equivalent semiconductor design and verification platforms.”
The ad says“Experience using EDA tools such as Cadence Virtuoso, Calibre, Synopsys, or equivalent semiconductor design and verification platforms.”
The ad says“Familiarity with data analytics, machine learning, Artificial Intelligence, Generative AI, Large Language Models (LLMs), AI Agents, Agentic AI, Cloud Assist, Code Assist, Roo Code, or other AI-Enabled engineering applications used to support technical analysis, automation, and productivity improvements.”
The ad says“Familiarity with data analytics, machine learning, Artificial Intelligence, Generative AI, Large Language Models (LLMs), AI Agents, Agentic AI, Cloud Assist, Code Assist, Roo Code, or other AI-Enabled engineering applications used to support technical analysis, automation, and productivity improvements.”
The ad says“Coursework, research, or project experience in VLSI Design, Physical Design, Layout Design, Design Rule Checking (DRC), Physical Verification, or semiconductor device physics and processing.”
The ad says“Exposure through coursework, research, or internship experience to semiconductor test chip design, silicon characterization, validation, process monitoring, advanced CMOS technologies, DRAM, HBM, or semiconductor automation.”
The ad says“Familiarity with data analytics, machine learning, Artificial Intelligence, Generative AI, Large Language Models (LLMs), AI Agents, Agentic AI, Cloud Assist, Code Assist, Roo Code, or other AI-Enabled engineering applications used to support technical analysis, automation, and productivity improvements.”
The ad says“Exposure through coursework, research, or internship experience to semiconductor test chip design, silicon characterization, validation, process monitoring, advanced CMOS technologies, DRAM, HBM, or semiconductor automation.”
The ad says“Familiarity with data analytics, machine learning, Artificial Intelligence, Generative AI, Large Language Models (LLMs), AI Agents, Agentic AI, Cloud Assist, Code Assist, Roo Code, or other AI-Enabled engineering applications used to support technical analysis, automation, and productivity improvements.”
The ad says“Experience with physical verification activities including DRC, LVS, parasitic extraction, layout debugging, or semiconductor validation methodologies.”
The ad says“Coursework, research, or project experience in VLSI Design, Physical Design, Layout Design, Design Rule Checking (DRC), Physical Verification, or semiconductor device physics and processing.”
The ad says“Experience with physical verification activities including DRC, LVS, parasitic extraction, layout debugging, or semiconductor validation methodologies.”
The ad says“Familiarity with data analytics, machine learning, Artificial Intelligence, Generative AI, Large Language Models (LLMs), AI Agents, Agentic AI, Cloud Assist, Code Assist, Roo Code, or other AI-Enabled engineering applications used to support technical analysis, automation, and productivity improvements.”
The ad says“Experience with physical verification activities including DRC, LVS, parasitic extraction, layout debugging, or semiconductor validation methodologies.”
The ad says“Coursework, research, or project experience in VLSI Design, Physical Design, Layout Design, Design Rule Checking (DRC), Physical Verification, or semiconductor device physics and processing.”
The ad says“Coursework, research, or project experience in VLSI Design, Physical Design, Layout Design, Design Rule Checking (DRC), Physical Verification, or semiconductor device physics and processing.”
The ad says“Exposure through coursework, research, or internship experience to semiconductor test chip design, silicon characterization, validation, process monitoring, advanced CMOS technologies, DRAM, HBM, or semiconductor automation.”
The ad says“Coursework, research, or project experience in VLSI Design, Physical Design, Layout Design, Design Rule Checking (DRC), Physical Verification, or semiconductor device physics and processing.”
The ad says“Familiarity with data analytics, machine learning, Artificial Intelligence, Generative AI, Large Language Models (LLMs), AI Agents, Agentic AI, Cloud Assist, Code Assist, Roo Code, or other AI-Enabled engineering applications used to support technical analysis, automation, and productivity improvements.”
The ad says“Coursework, research, or project experience in VLSI Design, Physical Design, Layout Design, Design Rule Checking (DRC), Physical Verification, or semiconductor device physics and processing.”
The ad says“Exposure through coursework, research, or internship experience to semiconductor test chip design, silicon characterization, validation, process monitoring, advanced CMOS technologies, DRAM, HBM, or semiconductor automation.”
The ad says“Experience with physical verification activities including DRC, LVS, parasitic extraction, layout debugging, or semiconductor validation methodologies.”
The ad says“Exposure through coursework, research, or internship experience to semiconductor test chip design, silicon characterization, validation, process monitoring, advanced CMOS technologies, DRAM, HBM, or semiconductor automation.”
The ad says“Experience using EDA tools such as Cadence Virtuoso, Calibre, Synopsys, or equivalent semiconductor design and verification platforms.”
The ad says“Exposure through coursework, research, or internship experience to semiconductor test chip design, silicon characterization, validation, process monitoring, advanced CMOS technologies, DRAM, HBM, or semiconductor automation.”
The ad says“Coursework, research, or project experience in VLSI Design, Physical Design, Layout Design, Design Rule Checking (DRC), Physical Verification, or semiconductor device physics and processing.”

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

The DRAM Design Rules team develops and maintains design rules, methodologies, and automation solutions that enable the successful design and manufacturing of advanced memory technologies. The team partners closely with Design, CAD, Process Integration, Verification, and Product Engineering organizations to ensure technology scalability, design quality, and manufacturing robustness.

As a DRAM Design Rules Intern, you will contribute to design rule development, validation, automation, and design enablement activities for next-generation memory products. This role provides hands-on experience with semiconductor build methodologies, industry-standard EDA tools, AI Supported analytics, and multi-functional engineering collaboration while helping drive future memory technology innovation.

Responsibilities

Assist in the development, documentation, validation, and optimization of semiconductor design rules for advanced memory technologies.
Support design enablement activities by developing methodologies, automation solutions, scripts, and workflows that improve design productivity, verification quality, and engineering efficiency.
Perform design rule validation, verification, and analysis using industry-standard EDA tools, simulation environments, and AI Supported analytics frameworks.
Collaborate with Design, CAD, Process Integration, Verification, and Product Engineering teams to evaluate technology features, process changes, and manufacturability requirements.
Support test chip planning, validation activities, and data analysis by using AI. Apply Artificial Intelligence technologies to speed up learning cycles and improve development methods.

Minimum Qualifications

Currently pursuing a Bachelor's, Master's, or PhD degree in Electrical Engineering, Computer Engineering, Semiconductor Engineering, Physics, Computer Science, or a related engineering discipline.
Fundamental understanding of semiconductor devices, CMOS circuits, and semiconductor manufacturing processes.
Programming or scripting experience using Python, Tcl, Perl, or similar languages.
Demonstrated analytical, problem-solving, and debugging skills.
Effective written and verbal communication skills with the ability to collaborate within multi-functional engineering teams.

Preferred Qualifications

Coursework, research, or project experience in VLSI Design, Physical Design, Layout Design, Design Rule Checking (DRC), Physical Verification, or semiconductor device physics and processing.
Experience using EDA tools such as Cadence Virtuoso, Calibre, Synopsys, or equivalent semiconductor design and verification platforms.
Experience with physical verification activities including DRC, LVS, parasitic extraction, layout debugging, or semiconductor validation methodologies.
Experience developing Python-based automation, software development, workflow optimization solutions, or design enablement tools.
Familiarity with data analytics, machine learning, Artificial Intelligence, Generative AI, Large Language Models (LLMs), AI Agents, Agentic AI, Cloud Assist, Code Assist, Roo Code, or other AI-Enabled engineering applications used to support technical analysis, automation, and productivity improvements.
Exposure through coursework, research, or internship experience to semiconductor test chip design, silicon characterization, validation, process monitoring, advanced CMOS technologies, DRAM, HBM, or semiconductor automation.

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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To learn more about Micron, please visit micron.com/careers

For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3)

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.

Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

Asks for

Values

Responsibilities

Minimum Qualifications

Preferred Qualifications