Asks for

The ad says“Protocol Knowledge: Deep understanding of data center protocols including PCIe, DDR and AMBA AXI/NoC”
The ad says“Automation Mastery: Expert-level Python, Tcl, and Bash skills to build and maintain the infrastructure for automated model releases and nightly regressions”
The ad says“Technical Skills: Mastery of SystemVerilog, Verilog, and C/C++ for transactor development and reference modeling.”
The ad says“Deep Palladium Expertise: Extensive hands-on experience with Cadence Palladium (Z1/Z2/Z3), including advanced clocking, ICE (In-Circuit Emulation), and Virtual Interface (VIF) flows”
The ad says“Protocol Knowledge: Deep understanding of data center protocols including PCIe, DDR and AMBA AXI/NoC”
The ad says“Deep Palladium Expertise: Extensive hands-on experience with Cadence Palladium (Z1/Z2/Z3), including advanced clocking, ICE (In-Circuit Emulation), and Virtual Interface (VIF) flows”
The ad says“Protocol Knowledge: Deep understanding of data center protocols including PCIe, DDR and AMBA AXI/NoC”
The ad says“Automation Mastery: Expert-level Python, Tcl, and Bash skills to build and maintain the infrastructure for automated model releases and nightly regressions”
The ad says“Hardware-Software Debug Skills: Proficiency in debugging low-level firmware and kernel-level issues using Verdi, SimVision, and hardware-software co-debug tools”
The ad says“Technical Skills: Mastery of SystemVerilog, Verilog, and C/C++ for transactor development and reference modeling.”
The ad says“Automation Mastery: Expert-level Python, Tcl, and Bash skills to build and maintain the infrastructure for automated model releases and nightly regressions”
The ad says“Hardware-Software Debug Skills: Proficiency in debugging low-level firmware and kernel-level issues using Verdi, SimVision, and hardware-software co-debug tools”
The ad says“Technical Skills: Mastery of SystemVerilog, Verilog, and C/C++ for transactor development and reference modeling.”
The ad says“Deep Palladium Expertise: Extensive hands-on experience with Cadence Palladium (Z1/Z2/Z3), including advanced clocking, ICE (In-Circuit Emulation), and Virtual Interface (VIF) flows”

About Positron AI

Positron AI specializes in developing custom hardware systems to accelerate AI inference. These inference systems offer significant performance and efficiency gains over traditional GPU-based systems, delivering advantages in both performance per dollar and performance per watt. Positron exists to create the world's best AI inference systems.

About the role

As Emulation Test Engineer, you'll provide technical direction for pre-silicon validation of Positron's next-generation AI inference ASIC. You'll own the end-to-end emulation strategy on the Cadence Palladium platform, architecting complex model builds, managing multi-rack partitioning, and driving the "left-shift" of our software development. You'll collaborate across RTL, DV, and Software teams to build high-performance virtual environments that prove out architectural functionality and accelerate firmware/OS bring-up months before tape-out. This role is critical to our silicon success: you'll set the emulation methodology, resolve hardware-software bottlenecks at scale, and ensure our design is silicon-ready.

What you'll do

Massive-Scale Model Architecture: Lead the partitioning and compilation of our design across a multi-rack Palladium environment, optimizing for performance and debug visibility.
Software Enablement (Left-Shift): Create and maintain the hybrid emulation and co-simulation environments (using SCE-MI or DPI) that allow our software teams to boot OS images and run AI workloads on pre-silicon hardware.
Full-Stack Validation: Design and execute comprehensive emulation test plans to verify high-speed interfaces (PCIe Gen 6/7, 112G+VSR, Ethernet) and complex AI memory hierarchies.
Performance & Power Analysis: Utilize Palladium’s Dynamic Power Analysis (DPA) and throughput monitors to identify "true peaks" and performance bottlenecks that simulation cannot capture.
Vendor Management: Act as the primary technical point of contact with Cadence R&D to troubleshoot tool issues and leverage the latest Palladium Z3 capabilities.

You'll Be Successful Here if You Have

Deep Palladium Expertise: Extensive hands-on experience with Cadence Palladium (Z1/Z2/Z3), including advanced clocking, ICE (In-Circuit Emulation), and Virtual Interface (VIF) flows
Complex SoC Background: A track record of emulating multi-billion gate designs where partitioning, runtime predictability, and compile efficiency were critical success factors
Automation Mastery: Expert-level Python, Tcl, and Bash skills to build and maintain the infrastructure for automated model releases and nightly regressions
Hardware-Software Debug Skills: Proficiency in debugging low-level firmware and kernel-level issues using Verdi, SimVision, and hardware-software co-debug tools

Minimum Requirements

Education: BS/MS in Electrical Engineering, Computer Engineering, or Computer Science.
Experience: 8+ years in ASIC Emulation or Verification, with significant experience on large-scale Palladium installations
Technical Skills: Mastery of SystemVerilog, Verilog, and C/C++ for transactor development and reference modeling.
Protocol Knowledge: Deep understanding of data center protocols including PCIe, DDR and AMBA AXI/NoC

Leveling & Scope

While this role is currently posted at a specific level, we are a growth-oriented organization and are open to hiring at a more senior level for the right candidate. Please note that this job description serves as a focused but generalized overview of the role; specific responsibilities and impact expectations will be tailored to the experience and seniority of the final hire.

Compensation & Benefits

The base salary range for this role is $180,000 – $300,000.

Please note that the figures provided represent the base salary range only and do not include other elements of our total compensation package, equity, or comprehensive benefits.

At Positron AI, we value the unique expertise each candidate brings. While the range above reflects our typical expectation for the position, we reserve the flexibility to exceed this range for candidates whose specialized skills, significant experience, or unique qualifications fall outside the standard scope of the role. Final offers are determined based on a variety of factors, including internal equity, and individual impact.

Benefits & Perks

We want you to do your best work and feel confident that you and your family are taken care of. That means comprehensive coverage, real time to rest, and support for your future.

Health and wellness

Fully company-paid medical, dental, and vision insurance for you and your dependents
Company-paid life and disability coverage, with voluntary options to add more
Supplemental hospital, critical illness, and accident coverage available

Time off and flexibility

Unlimited paid time off — we encourage everyone to truly unplug and recharge
13 paid company holidays
Remote-first culture with a company-provided computer and home office setup

Compensation and future

Competitive salary and equity
401(k) with company matching, eligible from day one

Visa Support

This position is open to candidates currently authorized to work in the U.S. We cannot provide new visa sponsorship for this role but are open to facilitating H-1B visa transfers for eligible candidates.

Equal Opportunity Employer. If you’re excited about the role but don’t meet every bullet, we’d still love to hear from you.