Asks for

The ad says“Strong background in metric driven verification, including planning, requirements extraction, constrained random verification and code coverage analysis”
The ad says“Strong background in metric driven verification, including planning, requirements extraction, constrained random verification and code coverage analysis”
The ad says“Expertise in SystemVerilog, SVA and Testbench design with verification frameworks like UVM/OVM, e, VMM”
The ad says“Strong background in metric driven verification, including planning, requirements extraction, constrained random verification and code coverage analysis”
The ad says“Proven track record in leading verification teams and delivering verification solutions for complex mixed-signal ICs.”
The ad says“Strong background in metric driven verification, including planning, requirements extraction, constrained random verification and code coverage analysis”
The ad says“Strong background in metric driven verification, including planning, requirements extraction, constrained random verification and code coverage analysis”
The ad says“Debugging skills for both RTL and Testbench problems”
The ad says“Expertise in SystemVerilog, SVA and Testbench design with verification frameworks like UVM/OVM, e, VMM”
The ad says“Expertise in SystemVerilog, SVA and Testbench design with verification frameworks like UVM/OVM, e, VMM”
The ad says“Debugging skills for both RTL and Testbench problems”
The ad says“Expertise in SystemVerilog, SVA and Testbench design with verification frameworks like UVM/OVM, e, VMM”
The ad says“Expertise in SystemVerilog, SVA and Testbench design with verification frameworks like UVM/OVM, e, VMM”
The ad says“Proven track record in leading verification teams and delivering verification solutions for complex mixed-signal ICs.”
The ad says“Expertise in SystemVerilog, SVA and Testbench design with verification frameworks like UVM/OVM, e, VMM”

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn’t do it without our extraordinary workforce – and that’s where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career!

Cirrus Logic has an exciting opportunity for a Design Verification Manager to lead our verification team in Newbury. In this role, you will guide a talented group of engineers through all aspects of digital verification for complete mixed-signal IC developments. You will shape verification strategy, drive execution excellence, and contribute to the evolution of verification methodology across Cirrus Logic. This is a unique opportunity to lead cutting edge projects within a global organisation while developing a high performing team. In return, we offer a great range of benefits including personal and professional development, a uniquely flat culture and much, much more!

Responsibilities:

Provide coaching, technical and performance development to support engineers at all levels.

Foster a collaborative, inclusive, and high-performance culture aligned with Cirrus Logic Values.

Lead and mentor a team of verification engineers to deliver ICs verified to some of the highest standards in the industry.

Work with stakeholders to define verification strategies and plans aligned with business needs.

Communicate verification status, risks, and mitigation plans clearly to engineering leadership.

Identify opportunities for improvements in verification and project execution. Work with partners to deliver the improvements.

Provide hands-on technical support where needed, including debugging, methodology decisions, and architectural discussions.

Required Skills and Qualifications:

Bachelor’s Degree, or above, in Electronics/Computer Science or other related discipline.

Proven track record in leading verification teams and delivering verification solutions for complex mixed-signal ICs.

Strong background in metric driven verification, including planning, requirements extraction, constrained random verification and code coverage analysis

Expertise in SystemVerilog, SVA and Testbench design with verification frameworks like UVM/OVM, e, VMM

Debugging skills for both RTL and Testbench problems

Strong ability to interpret results and resolve problems

An innovative, creative, lateral thinking problem solver

Preferred Skills and Qualifications:

Formal verification and verification qualification techniques

Scripting experience with Python, Ruby, sh/csh, TCL, Make, Perl

Gate level (including SDF)

Power aware verification (using CPF/UPF)

Object orientated programming (OOP) - Use of OOP design patterns

Export control restrictions based upon applicable laws and regulations would prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license. Candidates for this role must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role.

At Cirrus Logic, we believe that diversity drives innovation, and we are committed to encouraging an open and collaborative culture where different approaches, ideas, and points of view are respected and valued. We aim to promote a workplace where everyone can contribute irrespective of race, colour, national origin, religion or belief, gender or gender identity, sexual orientation, age, marital status, pregnancy status, or disability.