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Design Manual Publishing & Ground Rule Validation Engineer (2027 New College Graduate) at GLOBALFOUNDRIES SINGAPORE PTE. LTD. · Katori

Asks for

The ad says“Familiarity with EDA tools such as Cadence Virtuoso Schematic Editor, Virtuoso Layout Suite, and Calibre DRC and LVS.”
The ad says“Familiarity with EDA tools such as Cadence Virtuoso Schematic Editor, Virtuoso Layout Suite, and Calibre DRC and LVS.”
The ad says“Strong data analysis, data mining, and problem-solving skills.”
The ad says“Strong data analysis, data mining, and problem-solving skills.”
The ad says“Understanding of semiconductor process fabrication flow, nanofabrication, solid-state and semiconductor-device physics, and Design of Experiments methodology.”
The ad says“Strong organizational and documentation skills, with careful follow-through on day-to-day work and commitments.”
The ad says“Language Fluency - English (Written & Verbal)”
The ad says“Familiarity with EDA tools such as Cadence Virtuoso Schematic Editor, Virtuoso Layout Suite, and Calibre DRC and LVS.”
The ad says“Understanding of semiconductor process fabrication flow, nanofabrication, solid-state and semiconductor-device physics, and Design of Experiments methodology.”
The ad says“Strong organizational and documentation skills, with careful follow-through on day-to-day work and commitments.”
The ad says“Strong data analysis, data mining, and problem-solving skills.”
The ad says“Understanding of semiconductor process fabrication flow, nanofabrication, solid-state and semiconductor-device physics, and Design of Experiments methodology.”
The ad says“Understanding of semiconductor process fabrication flow, nanofabrication, solid-state and semiconductor-device physics, and Design of Experiments methodology.”
The ad says“Understanding of semiconductor process fabrication flow, nanofabrication, solid-state and semiconductor-device physics, and Design of Experiments methodology.”
The ad says“Familiarity with EDA tools such as Cadence Virtuoso Schematic Editor, Virtuoso Layout Suite, and Calibre DRC and LVS.”

About GlobalFoundries

GlobalFoundries (GF) is a leading manufacturer of essential semiconductors, enabling AI at scale from the cloud to the physical world. Through deep partnerships with customers, GF delivers differentiated, power‑efficient and high‑performance solutions for high‑growth markets. GF is a trusted and holistic technology partner for customers around the world. GF’s talented, global team remains focused every day on security, longevity, and sustainability. For more information, visit www.gf.com.

New College Graduates Overview:

We offer many full-time employment paths for recent graduates, which provide accelerated training in a fast-paced work environment, cross-functional working opportunities, and talent mobility. New college graduates are provided with mentorship, networking, and leadership opportunities, which give our new team members life-long connections and skills.

Summary of Role:

GlobalFoundries is seeking a highly motivated Design Manual Publishing & Ground Rule Validation Engineer to join the RF Design Enablement organization. This role develops, validates, documents, and publishes semiconductor design rules and Design Manual content that enable reliable, manufacturable, and customer-ready use of GlobalFoundries technologies.

Essential Responsibilities include:

Partner with Process Integration, Manufacturing, Device Engineering, Customer Engineering, Program Management, PDK Development, and EDA teams to identify technology features and process limitations requiring design-rule coverage.

Participate in the development, optimization, and qualification of semiconductor design rules across multiple technology platforms.

Perform design-rule margin calculations using process, reliability, yield, and silicon-characterization data.

Develop layout-based Designs of Experiments (DOEs) and electrical test structures for inclusion on technology test vehicles.

Coordinate Ground Rule Validation activities from layout creation through silicon measurement and data collection.

Analyze silicon characterization results using statistical and data-mining techniques to assess rule robustness and manufacturability.

Generate technical reports and recommendations supporting design-rule qualification decisions.

Drive continuous improvement of design rules and process assumptions based on measured silicon data.

Own the preparation, review, publication, and maintenance of Design Manual content delivered as part of GlobalFoundries PDK releases.

Collaborate with PDK teams and technology stakeholders to collect, validate, and document publication requirements.

Ensure Design Manual content is technically accurate, complete, consistent, and aligned with approved design rules.

Execute document quality-assurance reviews, change tracking, revision control, and publishing workflows.

Support Design Manual release-readiness reviews and publication milestones.

Maintain documentation repositories, publication records, release notes, and supporting documentation artifacts.

Improve Design Manual publishing processes, templates, tools, and automation workflows.

Other Responsibilities:

Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications:

Education – Graduating with Bachelor’s degree in Electrical Engineering, Materials Science, Solid State Physics or related field from an accredited degree program.

Must have at least an overall 3.0 GPA and proven good academic standing.

Language Fluency - English (Written & Verbal)

Strong organizational and documentation skills, with careful follow-through on day-to-day work and commitments.

Strong data analysis, data mining, and problem-solving skills.

Understanding of semiconductor process fabrication flow, nanofabrication, solid-state and semiconductor-device physics, and Design of Experiments methodology.

Strong interpersonal skills and the ability to work effectively in a dynamic, fast-paced, cross-functional environment.

Familiarity with EDA tools such as Cadence Virtuoso Schematic Editor, Virtuoso Layout Suite, and Calibre DRC and LVS.

Preferred Qualifications:

Prior related internship or co-op experience.

Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.

Strong interest in leveraging AI tools and emerging technologies to enhance productivity, streamline workflows, and support effective decision-making.

Project management skills, i.e. the ability to innovate and execute solutions that matter; the ability to navigate ambiguity.

Strong written and verbal communication skills

Strong planning & organizational skills

Master’s degree in Electrical Engineering, Computer Engineering, Solid State Physics, Materials Science, or another relevant engineering discipline, with 0 to 2 years of semiconductor-industry experience in device engineering, process integration, or unit-process areas.

PhD in Electrical Engineering, Computer Engineering, Solid State Physics, Materials Science, or another relevant engineering discipline; or demonstrated ability to solve complex, non-recurring problems with initiative and creativity.

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Expected Salary Range

$85,000.00 - $146,000.00

The exact Salary will be determined based on qualifications, experience and location.

If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.

An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.

GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.

All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law