Design Engineer II

Asks for

• AI-driven coverage analysisThe ad says“Advanced Verification: Champion the integration of formal verification, and AI-driven coverage analysis.”
• AMBAThe ad says“Experience with processor integration (e.g., RISC-V or ARM) and industry-standard protocols like AMBA/PCIe.”
• architectural modelingThe ad says“Experience in SystemVerilog/UVM and C/C++ for architectural modeling.”
• ARMThe ad says“Experience with processor integration (e.g., RISC-V or ARM) and industry-standard protocols like AMBA/PCIe.”
• CThe ad says“Experience in SystemVerilog/UVM and C/C++ for architectural modeling.”
• C++The ad says“Experience in SystemVerilog/UVM and C/C++ for architectural modeling.”
• formal verificationThe ad says“Advanced Verification: Champion the integration of formal verification, and AI-driven coverage analysis.”
• PCIeThe ad says“Experience with processor integration (e.g., RISC-V or ARM) and industry-standard protocols like AMBA/PCIe.”
• PerlThe ad says“Expertise in scripting (Perl, Python, or Tcl) for verification flow automation.”
• processor integrationThe ad says“Experience with processor integration (e.g., RISC-V or ARM) and industry-standard protocols like AMBA/PCIe.”
• PythonThe ad says“Expertise in scripting (Perl, Python, or Tcl) for verification flow automation.”
• RISC-VThe ad says“Experience with processor integration (e.g., RISC-V or ARM) and industry-standard protocols like AMBA/PCIe.”
• scriptingThe ad says“Expertise in scripting (Perl, Python, or Tcl) for verification flow automation.”
• SystemVerilogThe ad says“Experience in SystemVerilog/UVM and C/C++ for architectural modeling.”
• TclThe ad says“Expertise in scripting (Perl, Python, or Tcl) for verification flow automation.”
• UVMThe ad says“Experience in SystemVerilog/UVM and C/C++ for architectural modeling.”