Asks for

The ad says“Expertise in developing CAD Solutions in the areas of dft and synthesis using Siemens, Cadence or Synopsys EDA tool suite”
The ad says“Develop and drive Design-for-Test methodologies emphasizing on best-in-class Methodologies for corporate wide digital flows using EDA tools from leading vendors like Siemens and Cadence”
The ad says“Sound Knowledge in Cadence EDA synthesis and formal equivalence checking (Genus, Conformal)”
The ad says“Develop and drive Design-for-Test methodologies emphasizing on best-in-class Methodologies for corporate wide digital flows using EDA tools from leading vendors like Siemens and Cadence”
The ad says“Expertise in developing CAD Solutions in the areas of dft and synthesis using Siemens, Cadence or Synopsys EDA tool suite”
The ad says“Experience in overall digital implementation flows (RTL to GDS II) and has a well-proven track record of being involved in successful multi-million gate SOC design tapeouts in nanometer technology.”
The ad says“Develop and drive Design-for-Test methodologies emphasizing on best-in-class Methodologies for corporate wide digital flows using EDA tools from leading vendors like Siemens and Cadence”
The ad says“Experience in working on advanced nanometer and finfet process technologies.”
The ad says“Sound Knowledge in Cadence EDA synthesis and formal equivalence checking (Genus, Conformal)”
The ad says“Sound Knowledge in Cadence EDA synthesis and formal equivalence checking (Genus, Conformal)”
The ad says“Experience in overall digital implementation flows (RTL to GDS II) and has a well-proven track record of being involved in successful multi-million gate SOC design tapeouts in nanometer technology.”
The ad says“Strong experience in automation of methodologies/solution using TCL, Python, PERL and Tk.”
The ad says“Strong experience in automation of methodologies/solution using TCL, Python, PERL and Tk.”
The ad says“Develop and drive Design-for-Test methodologies emphasizing on best-in-class Methodologies for corporate wide digital flows using EDA tools from leading vendors like Siemens and Cadence”
The ad says“Expertise in developing CAD Solutions in the areas of dft and synthesis using Siemens, Cadence or Synopsys EDA tool suite”
The ad says“Expertise in developing CAD Solutions in the areas of dft and synthesis using Siemens, Cadence or Synopsys EDA tool suite”
The ad says“Strong experience in automation of methodologies/solution using TCL, Python, PERL and Tk.”
The ad says“Strong experience in automation of methodologies/solution using TCL, Python, PERL and Tk.”

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

Position           : CAD Engineer (Digital)
Experience      : 5+ years
Education        : Bachelors/Masters engineering degree in Computer Science/Electrical/Micro-Electronics
Location          : Bangalore (ADBL)
Job Grade       : P3

Responsibilities

Develop and drive Design-for-Test methodologies emphasizing on best-in-class Methodologies for corporate wide digital flows using EDA tools from leading vendors like Siemens and Cadence
Work with global CAD methodology development team to automate and integrate the above CAD flows for centralized deployment
Provide strong technical expertise and consultations on Design-for-Test and front-end design EDA flows to ADI’s Business Units and ensure successful tapeouts of their products

Desired Skills:

Expertise in developing CAD Solutions in the areas of dft and synthesis using Siemens, Cadence or Synopsys EDA tool suite
Experience in overall digital implementation flows (RTL to GDS II) and has a well-proven track record of being involved in successful multi-million gate SOC design tapeouts in nanometer technology.
Experience in working on advanced nanometer and finfet process technologies.
Sound Knowledge in Cadence EDA synthesis and formal equivalence checking (Genus, Conformal)
Strong experience in automation of methodologies/solution using TCL, Python, PERL and Tk.
Debugging experience to debug vendor tool problems and interacting with designers to help tackle their problems
Possess excellent interpersonal and communication skills to collaborate and influence design development groups across the globe

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

Required Travel: Yes, 10% of the time

Shift Type: 1st Shift/Days