ASIC Design Engineer

Austin, Texas, United StatesPosted 2 months ago

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Opens Volantis Semiconductor, Inc.'s own application

Salary: Not stated
Where: Austin, Texas, United States (work mode not stated)
Contract: Not stated
Experience asked: Not stated
Degree asked: Not stated
Languages required: Not stated
Work permit: Not stated
Posted: 2 months ago; 4 Aug 2026

Asks for

The ad says“Hands-on experience with multiple advanced node tapeouts”
The ad says“Hands-on experience with ASIC design process for large die (ideally reticle max) chips”
The ad says“Understanding of PPA improvement and what levers exist for each level of the stack”

Values

The ad says“Hands-on experience with ASIC design process for AI chips”
The ad says“Hands-on experience with ASIC design process for large die (ideally reticle max) chips”
The ad says“Hands-on experience with multi-die/multi-chiplet/MCM designs”

What We’re Looking For:

We’re looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer.

Ideal Background:

An ideal candidate will have:

Hands-on experience with multiple advanced node tapeouts
Ownership of ASIC design portion of at least one block in multiple advanced node tapeouts
Understanding of PPA improvement and what levers exist for each level of the stack
Ability to think creatively about methodology for fast design iterations

Nice to Have:

Hands-on experience with ASIC design process for large die (ideally reticle max) chips
Hands-on experience with ASIC design process for AI chips
Hands-on experience with multi-die/multi-chiplet/MCM designs

Volantis Semiconductor, Inc.

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